The invention is directed to a method for remelting voltaic tin or tin-lead layers on printed circuit boards.
As known, the reliability of all electronic devices is largely dependent on the quality of the printed circuit boards integrated therein. The quality of the printed circuit boards is in turn critically dependent on the quality of their through-connections or interlayer connections, of its layer bonding, as well as on the solderability of the printed circuit board surface.
In order to facilitate solder work on printed circuits, the copper interconnects are often tin-plated in order to avoid the oxidation of the copper surfaces. For the highest quality demands, a voltaic tin or tin-lead alloy having a tin-to-lead ratio of 20:40 is thereby applied in a thickness of 12 to 15 .mu.m and this layer is subsequently remelted with a heating process, for example by influencing with thermal radiation or by immersing into a hot oil bath (German Published Application 25 02 900). This is necessary since such electro-deposited layers are very poorly solderable.
Stresses appear in the printed circuit board due to the thermic load on the printed circuit boards during the remelting (reflowing) of the electro-deposited metal layers and the adhesion between resin and copper decreases. There is the risk that the printed circuit board will be damaged as a result of these phenomena. This damage can be both a delamination (separating of the layers) as well as a breaking of the through-connections or interlayer connections.
Up to now, the printed circuit boards have been remelted at atmospheric pressure. Printed circuit board damage thereby had to be accepted.